HASSHIC: Hardware Architecture for Spatial-Spectral Classification of Hyperspectral Images Through Segmentation and Feature Extraction.
Remote sensing; Hyperspectral images; Neural networks; Hardware architec-
ture; Hardware accelerator.
Remote sensing through the acquisition of Hyperspectral Images (HSIs) has vast applicati-
ons, whether in agriculture, natural resources mapping, or fire detection. Such images can
be collected from satellites, and by 2021, 24 collection platforms had been launched into
space. Alongside this, the use of machine learning algorithms has also been growing, as
has their use in the domain of HSIs for pixel classification, where the model uses spectral,
spatial, or both information to identify whether that pixel, for example, corresponds to
water, vegetation, or another type of material. Therefore, this work aims to implement, test,
and validate a hardware architecture for satellite applications, considering power, accuracy,
performance, quantization, and FPGA resource allocation metrics. The results are to be
obtained through simulations with a representation of the architecture in both Python
and VHDL, as well as the synthesis of the accelerator for FPGA. The architecture should
be able to accelerate classification both spatially and spectrally and have an accelerator
for 1D convolutional networks (spectral) in FPGA and a CPU for segmentation (spatial),
consisting of a hardware/software co-design methodology. The architecture also explores
the predictability of label changes in pixels through the segmentation process, allowing
the neural network to operate even before the segmentation is complete. Results obtained
so far show that it is possible to predict that pixels in specific positions have up to an 80%
chance of having their labels unchanged during segmentation, which can be sent to the
neural network even before segmentation is finalized. Additionally, the neural network used
in this work is a modified version of previous works to simplify hardware implementation,
and even with such simplifications, the accuracy degradation compared to other networks
was low. Thus, once the operations in the architecture are ensured, good accuracy results
should be achieved, and the parallelization of segmentation and the neural network, as well
as the use of a pipeline in the accelerator, endows the architecture with great performance
potential.