Banca de QUALIFICAÇÃO: WYSTERLANYA KYURY PEREIRA BARROS

Uma banca de QUALIFICAÇÃO de MESTRADO foi cadastrada pelo programa.
STUDENT : WYSTERLANYA KYURY PEREIRA BARROS
DATE: 01/10/2020
TIME: 10:00
LOCAL: https://harvard.zoom.us/j/99754964784
TITLE:

Hardware Implementation Proposal for the Otsu Algorithm Applied to Real-Time Tracking of Worms

KEY WORDS:

Worm tracking, Digital image processing, Otsu, FPGA, Hardware

PAGES: 50
BIG AREA: Engenharias
AREA: Engenharia Elétrica
SUBÁREA: Circuitos Elétricos, Magnéticos e Eletrônicos
SPECIALTY: Circuitos Eletrônicos
SUMMARY:

The techniques of digital image processing are used in different computational solutions in the health area, and one is being behavioral genomics. Several studies in this area use the worm Caenorhabditis elegans, analyzing its behavior through tracking algorithms. One of the fundamental steps in this process is the segmentation of the worm at the background of the image, using image processing methods, in which one of the most used is the Otsu method. However, this technique's application in real-time associated with videos captured with high resolution has a high computational cost due to the massive data generation. A way to drive real-time processing feasible is to use specialized or dedicated hardware, thereby exploring the Otsu method's parallelism. Thus, this work proposes a parallel implementation of the Otsu method in specialized hardware using the Field Programmable Gate Array (FPGA) for real-time image processing. Details of the developed architecture are presented, as well as the occupation data, execution time, and hardware consumption. Partial results show that the implementation is able to achieve high throughput, allowing the use of the technique for processing the videos in real-time.

BANKING MEMBERS:
Presidente - 1837240 - MARCELO AUGUSTO COSTA FERNANDES
Interno - 2929823 - RAFAEL BESERRA GOMES
Externo ao Programa - 1279464 - AGOSTINHO DE MEDEIROS BRITO JUNIOR