Banca de QUALIFICAÇÃO: VICTOR HUGO FREITAS DE OLIVEIRA

Uma banca de QUALIFICAÇÃO de MESTRADO foi cadastrada pelo programa.
DISCENTE : VICTOR HUGO FREITAS DE OLIVEIRA
DATA : 07/12/2018
HORA: 15:00
LOCAL: Auditório nPITI
TÍTULO:

Application speedup characterization: modeling parallelization overhead and variations of problem size and number of cores


PALAVRAS-CHAVES:

Parallel Computing, Multi-core Architecture, Application Characterization, Performance Modeling.


PÁGINAS: 62
GRANDE ÁREA: Engenharias
ÁREA: Engenharia Elétrica
RESUMO:

To make efficient use of multi-core processors, it is important to understand the performance behavior of parallel applications. Modeling this behavior can enable the use of online approaches to optimize throughput or energy, or even guarantee a minimum QoS. Accurate models would avoid having to probe different runtime configurations, which causes overhead. Throughout the years, many speedup models were proposed. Most of them based on Amdahl’s law or Gustafson’s law. However, many of those make considerations such as a fixed parallel fraction, or a parallel fraction that varies linearly with problem size, and inexistent parallelization overhead. Although such models aid in the theoretical understanding of parallel computing, these considerations do not hold in real environments, which makes the modeling unsuitable for accurate characterization of parallel applications. The model proposed in this paper estimates the speedup taking into account the variation of its parallel fraction according to problem size, number of cores used and overhead caused by the parallelization. Using four applications from the PARSEC benchmark suite, the proposed model was able to estimate speedups more accurately than other models in recent literature.


MEMBROS DA BANCA:
Presidente - 1673543 - SAMUEL XAVIER DE SOUZA
Externo à Instituição - CALEBE DE PAULA BIANCHINI - UPM
Externo à Instituição - CARLOS AVELINO DE BARROS - IFRN
Notícia cadastrada em: 23/11/2018 16:03
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