The age of computing has emerged relatively recently, but it's in constantly and fast evolving. The early architectures have used one processor to perform computational operations. For improvement in this architecture was constantly increased the operating frequency of processors, thus enabling them to perform more procedures per second, so improving their performance. However it was noted that there are limitations in this process because of physical settings the more the frequency is increased, the greater will be the power dissipated by the processor, that is, the greater its energy consumption and its  temperature. To work around these limitations, they began to be developed processors with more than one processing core, called multi-core processors. This enabled the performance  of the processors increase without it being necessary to increase the frequency.  Creating faster processors or that have the same performance using less energy. Using  a RISC-V-based architecture and also an FPGA enabling rapid development, this work aims  to create an experimental multi-core architecture, performing tests on frequency adjustments to be made to minimize the energy consumption in parallel applications.