Banca de QUALIFICAÇÃO: JOAO VITOR DE SOUZA LOPES
Uma banca de QUALIFICAÇÃO de MESTRADO foi cadastrada pelo programa.STUDENT : JOAO VITOR DE SOUZA LOPES
DATE: 01/10/2026
TIME: 10:00
LOCAL: Virtual a definir
TITLE:
LUT Optimization for Piecewise Linear Approximations in Embedded Systems via Reinforcement Learning
KEY WORDS:
LUT, PWL, Reinforcement Learning, PPO, MaskablePPO, MDP formulation, Embedded Systems, Function Approximation.
PAGES: 108
BIG AREA: Engenharias
AREA: Engenharia Elétrica
SUMMARY:
In many scenarios, nonlinear functions are required in embedded systems for measuring or generating output signals. However, implementing these functions can be computationally intensive in architectures with hardware constraints, particularly limited resolution, fixed-point arithmetic, and limited memory. In such cases, it is common to use look-up tables (LUTs), in which precomputed values of the function are stored and accessed at runtime. In their direct form, these LUTs perform 1:1 mapping, that is, they store an output value for each possible input. In this context, the goal is to determine the minimum number of breakpoints that preserves the validity of the approximation, striking a balance between precision and resource usage. To this end, various approaches have been proposed, including evolutionary computation, numerical methods, and other optimization strategies.
In this work, we propose a formulation based on deep reinforcement learning for constructing PWL (Piecewise Linear Approximation — PWL) approximations with error constraints, using the Proximal Policy Optimization (PPO) algorithm, with invalid action masking (MaskablePPO). The approach is evaluated on the problem of approximating the sine function in the first quadrant, and the results are presented for different input resolutions and output value representations.
COMMITTEE MEMBERS:
Presidente - 1284113 - SEBASTIAN YURI CAVALCANTI CATUNDA
Interno - 2579664 - ALLAN DE MEDEIROS MARTINS
Externo à Instituição - JUAN MOISES MAURICIO VILLANUEVA - UFPB