Hardware Architecture Proposal for TEDA Algorithm to Data Streaming
Data streaming, specialised hardware, TEDA, multiple sensors
The amount of data in real-time, such as time series and streaming data, continues to grow. Analysing this data the moment it arrives can bring immense added value. However, it also requires much computational effort and new acceleration techniques. As a possible solution to this problem, we propose a hardware architecture for Typicality and Eccentricity Data Analytic (TEDA) algorithm implemented on Field Programmable Gate Arrays (FPGA) for data streaming. TEDA is based on a new approach to outlier detection in the data stream context. The suggested design has a full parallel input of N elements and a 3-stage pipelined architecture to reduce the critical path and thus optimise the throughput. To validate the proposals, results of the occupation, throughput and power efficiency of the proposed hardware are presented. Compared to other software platforms, the design reached a speed of up to 693x, with a throughput of up to 10.96 MSPs (Mega Sample Per second) with a dynamic power of 16mW. Besides, the bit-accurate simulation results are also presented for different application scenarios with multiple sensors ranging from applications in Industry 4.0 environments to the Internet of Medical Things (IoMT). This work is a pioneer in the hardware implementation of the TEDA technique in specialised hardware.