Specialized Hardware Applied to Acceleration of Algorithms in the Information Security Area
SHA-256, SHA-3, FPGA, Anomaly detection
The development of new methodologies for data transmission and connectivity brings with it the need for controls related to information security, such as the verification of the integrity of messages and files, with the wide use of hash algorithms, and the legitimate or malicious detection of traffic computer networks. In addition to efficient security controls, the massive amount of data generated by various devices connected to the networks requires that information security implementations be made at high processing speed. Thus, this work aims to speed up the processing of information security applications by implementing specialized hardware. For that, implementations in specific hardware will be proposed for the hash algorithms SHA-256 and SHA-3 (Keccak), and an architecture for the detection of anomalies in networks based on evolutionary systems with real-time data flow algorithms. The hardware architectures will be implemented and validated in a Field Programmable Gate Array (FPGA). The preliminary results presented here, obtained through the SHA-256 algorithm's implementation, indicate the feasibility of this proposal.