Parallel implementation of genetic algorithm on FPGA
FPGA, Hardware, Genetic Algorithm, Parallel Processing.
Genetic Algorithms (GAs) are used to solve search and optimization problems in which an optimal solution can be found using an iterative process and using probabilistic and non-deterministic transitions. However, depending on the type of problem, the time required to find a solution can be high in sequential machines due to the computational complexity of genetic algorithm. This work proposes a parallel implementation of a genetic algorithm on field-programmable gate array (FPGA). Optimization of the system’s processing time is the main goal of this project. Results associated with the processing time and area occupancy (in FPGA) for various population size are analyzed. Studies concerning the accuracy of the GA response for the optimization of functions with one and two variables were also analyzed for the hardware implementation. The project was developed using the System Generator software (Xilinx development platform) and the Virtex-7 xc7vx550t-1ffg1158 FPGA.