Banca de QUALIFICAÇÃO: JOYRAN THADEU PEREIRA DE VASCONCELOS

Uma banca de QUALIFICAÇÃO de MESTRADO foi cadastrada pelo programa.
STUDENT : JOYRAN THADEU PEREIRA DE VASCONCELOS
DATE: 16/02/2023
TIME: 10:00
LOCAL: Virtual - https://meet.google.com/qxz-fmhr-tkj
TITLE:

Fault Tolerance with Learning Machine applied to hybrid NoCs 

KEY WORDS:

Hybrid Networks on Chip, Fault Tolerance, Machine Learning, Noxim, NGSA-II

PAGES: 50
BIG AREA: Ciências Exatas e da Terra
AREA: Ciência da Computação
SUBÁREA: Sistemas de Computação
SPECIALTY: Arquitetura de Sistemas de Computação
SUMMARY:

The increment in the integration capacity of the chips allowed the development of sys-tems with several processing cores, with the networks-on-chip (NoC) becoming the main paradigm in the communication between elements of multiprocessor systems-on-chip (MP-SoC). Several works have proposed in order to meet restrictions of median latency, area, energy consumption. The projects also cover the network architecture, with the gene-ration of topologies that provide optimized performance for specific applications. This work proposes a heuristic for the generation of fault-tolerant topologies capable of deli-vering real-time and non-real-time packets via an alternative path in the network even if a link fail. Exploration will search fault-tolerant topologies that are able to deliver the largest number of packages possible on time. The implementation development is based on the NoC42 simulator, making it capable of working with irregular topologies, real-time packages and a routing algorithm based on a routing table

COMMITTEE MEMBERS:
Presidente - 1882699 - MONICA MAGALHAES PEREIRA
Interno - 1694485 - MARCIO EDUARDO KREUTZ
Externo à Instituição - SILVIO ROBERTO FERNANDES DE ARAUJO